vSMC
vSMC: Scalable Monte Carlo
cpuid.hpp
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1 //============================================================================
2 // vSMC/include/vsmc/utility/cpuid.hpp
3 //----------------------------------------------------------------------------
4 // vSMC: Scalable Monte Carlo
5 //----------------------------------------------------------------------------
6 // Copyright (c) 2013,2014, Yan Zhou
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31 
32 #ifndef VSMC_UTILITY_CPUID_HPP
33 #define VSMC_UTILITY_CPUID_HPP
34 
35 #include <vsmc/internal/common.hpp>
36 #include <vsmc/utility/array.hpp>
37 
38 #ifdef VSMC_MSVC
39 #include <intrin.h>
40 #endif
41 
42 #define VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(feat, a, c, i, b) \
43 template <> struct CPUIDFeatureInfo<CPUIDFeature##feat> \
44 { \
45  static std::string str () {return std::string(#feat);} \
46  static VSMC_CONSTEXPR const unsigned eax = a##U; \
47  static VSMC_CONSTEXPR const unsigned ecx = c##U; \
48  static VSMC_CONSTEXPR const unsigned bit = b##U; \
49  static VSMC_CONSTEXPR const std::size_t index = i; \
50 };
51 
52 #define VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(feat, a, c, i, b) \
53 template <> struct CPUIDFeatureInfo<CPUIDFeatureExt##feat> \
54 { \
55  static std::string str () {return std::string(#feat);} \
56  static VSMC_CONSTEXPR const unsigned eax = 0x80000000U + a##U; \
57  static VSMC_CONSTEXPR const unsigned ecx = c##U; \
58  static VSMC_CONSTEXPR const unsigned bit = b##U; \
59  static VSMC_CONSTEXPR const std::size_t index = i; \
60 };
61 
62 namespace vsmc {
63 
67 inline void cpuid (unsigned eax, unsigned ecx, unsigned *reg)
68 {
69 #ifdef VSMC_MSVC
70  __cpuidex(reinterpret_cast<int *>(reg),
71  static_cast<int>(eax), static_cast<int>(ecx));
72 #else // VSMC_MSVC
73  unsigned ebx = 0x00;
74  unsigned edx = 0x00;
75  __asm__ volatile
76  (
77  "cpuid\n"
78  : "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
79  : "a" (eax), "c" (ecx)
80  );
81  reg[0] = eax;
82  reg[1] = ebx;
83  reg[2] = ecx;
84  reg[3] = edx;
85 #endif // VSMC_MSVC
86 }
87 
90 enum CPUIDFeature
91 {
92  CPUIDFeatureSSE3,
93  CPUIDFeaturePCLMULQDQ,
94  CPUIDFeatureDTES64,
95  CPUIDFeatureMONITOR,
96  CPUIDFeatureDS_CPL,
97  CPUIDFeatureVMX,
98  CPUIDFeatureSMX,
99  CPUIDFeatureEST,
100  CPUIDFeatureTM2,
101  CPUIDFeatureSSSE3,
102  CPUIDFeatureCNXT_ID,
103  CPUIDFeatureFMA,
104  CPUIDFeatureCX16,
105  CPUIDFeatureXTPR,
106  CPUIDFeaturePDCM,
107  CPUIDFeaturePCID,
108  CPUIDFeatureDCA,
109  CPUIDFeatureSSE4_1,
110  CPUIDFeatureSSE4_2,
111  CPUIDFeatureX2APIC,
112  CPUIDFeatureMOVBE,
113  CPUIDFeaturePOPCNT,
114  CPUIDFeatureTSC_DEADLINE,
115  CPUIDFeatureAES,
116  CPUIDFeatureXSAVE,
117  CPUIDFeatureOSXSAVE,
118  CPUIDFeatureAVX,
119  CPUIDFeatureF16C,
120  CPUIDFeatureRDRAND,
121  CPUIDFeatureHYPERVISOR,
122 
123  CPUIDFeatureFPU,
124  CPUIDFeatureVME,
125  CPUIDFeatureDE,
126  CPUIDFeaturePSE,
127  CPUIDFeatureTSC,
128  CPUIDFeatureMSR,
129  CPUIDFeaturePAE,
130  CPUIDFeatureMCE,
131  CPUIDFeatureCX8,
132  CPUIDFeatureAPIC,
133  CPUIDFeatureSEP,
134  CPUIDFeatureMTRR,
135  CPUIDFeaturePGE,
136  CPUIDFeatureMCA,
137  CPUIDFeatureCMOV,
138  CPUIDFeaturePAT,
139  CPUIDFeaturePSE_36,
140  CPUIDFeaturePSN,
141  CPUIDFeatureCLFSH,
142  CPUIDFeatureDS,
143  CPUIDFeatureACPI,
144  CPUIDFeatureMMX,
145  CPUIDFeatureFXSR,
146  CPUIDFeatureSSE,
147  CPUIDFeatureSSE2,
148  CPUIDFeatureSS,
149  CPUIDFeatureHTT,
150  CPUIDFeatureTM,
151  CPUIDFeatureIA64,
152  CPUIDFeaturePBE,
153 
154  CPUIDFeatureFSGSBASE,
155  CPUIDFeatureBMI1,
156  CPUIDFeatureHLE,
157  CPUIDFeatureAVX2,
158  CPUIDFeatureSMEP,
159  CPUIDFeatureBMI2,
160  CPUIDFeatureERMS,
161  CPUIDFeatureINVPCID,
162  CPUIDFeatureRTM,
163  CPUIDFeatureMPX,
164  CPUIDFeatureAVX512F,
165  CPUIDFeatureAVX512DQ,
166  CPUIDFeatureRDSEED,
167  CPUIDFeatureADX,
168  CPUIDFeatureSMAP,
169  CPUIDFeatureAVX512IFMA52,
170  CPUIDFeatureCLFLUSHOPT,
171  CPUIDFeatureINTEL_TRACE,
172  CPUIDFeatureAVX512PF,
173  CPUIDFeatureAVX512ER,
174  CPUIDFeatureAVX512CD,
175  CPUIDFeatureSHA,
176  CPUIDFeatureAVX512BW,
177  CPUIDFeatureAVX512VL,
178 
179  CPUIDFeaturePREFETCHWT1,
180  CPUIDFeatureAVX512VBMI,
181 
182  CPUIDFeatureExtLAHF_LM,
183  CPUIDFeatureExtCMP_LEGACY,
184  CPUIDFeatureExtSVM,
185  CPUIDFeatureExtEXTAPIC,
186  CPUIDFeatureExtCR8_LEGACY,
187  CPUIDFeatureExtABM,
188  CPUIDFeatureExtSSE4A,
189  CPUIDFeatureExtMISALIGNSSE,
190  CPUIDFeatureExt3DNOWPREFETCH,
191  CPUIDFeatureExtOSVW,
192  CPUIDFeatureExtIBS,
193  CPUIDFeatureExtXOP,
194  CPUIDFeatureExtSKINIT,
195  CPUIDFeatureExtWDT,
196  CPUIDFeatureExtLWP,
197  CPUIDFeatureExtFMA4,
198  CPUIDFeatureExtTCE,
199  CPUIDFeatureExtNODEID_MSR,
200  CPUIDFeatureExtTBM,
201  CPUIDFeatureExtTOPOEXT,
202  CPUIDFeatureExtPERFCTR_CORE,
203  CPUIDFeatureExtPERFCTR_NB,
204  CPUIDFeatureExtDBX,
205  CPUIDFeatureExtPERFTSC,
206  CPUIDFeatureExtPCX_L2I,
207 
208  CPUIDFeatureExtFPU,
209  CPUIDFeatureExtVME,
210  CPUIDFeatureExtDE,
211  CPUIDFeatureExtPSE,
212  CPUIDFeatureExtTSC,
213  CPUIDFeatureExtMSR,
214  CPUIDFeatureExtPAE,
215  CPUIDFeatureExtMCE,
216  CPUIDFeatureExtCX8,
217  CPUIDFeatureExtAPIC,
218  CPUIDFeatureExtSYSCALL,
219  CPUIDFeatureExtMTRR,
220  CPUIDFeatureExtPGE,
221  CPUIDFeatureExtMCA,
222  CPUIDFeatureExtCMOV,
223  CPUIDFeatureExtPAT,
224  CPUIDFeatureExtPSE36,
225  CPUIDFeatureExtMP,
226  CPUIDFeatureExtNX,
227  CPUIDFeatureExtMMX,
228  CPUIDFeatureExtMMXEXT,
229  CPUIDFeatureExtFXSR,
230  CPUIDFeatureExtFXSR_OPT,
231  CPUIDFeatureExtGBPAGES,
232  CPUIDFeatureExtRDTSCP,
233  CPUIDFeatureExtLM,
234  CPUIDFeatureExt3DNOWEXT,
235  CPUIDFeatureExt3DNOW
236 }; // enum CPUIDFeature
237 
239 enum CPUIDCacheType
240 {
241  CPUIDCacheTypeNull,
242  CPUIDCacheTypeData,
243  CPUIDCacheTypeInstruction,
244  CPUIDCacheTypeUnified
245 }; // enum CPUIDCacheType
246 
252 template <CPUIDFeature>
253 struct CPUIDFeatureInfo
254 {
256  static std::string str ();
257 
259  static VSMC_CONSTEXPR const unsigned eax = 0x00U;
260 
262  static VSMC_CONSTEXPR const unsigned ecx = 0x00U;
263 
265  static VSMC_CONSTEXPR const unsigned index = 0x00U;
266 
268  static VSMC_CONSTEXPR const unsigned bit = 0x00U;
269 }; // struct CPUIDFeatureInfo
270 
271 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SSE3, 0x01, 0x00, 2, 0)
272 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PCLMULQDQ, 0x01, 0x00, 2, 1)
273 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(DTES64, 0x01, 0x00, 2, 2)
274 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MONITOR, 0x01, 0x00, 2, 3)
275 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(DS_CPL, 0x01, 0x00, 2, 4)
276 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(VMX, 0x01, 0x00, 2, 5)
277 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SMX, 0x01, 0x00, 2, 6)
278 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(EST, 0x01, 0x00, 2, 7)
279 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(TM2, 0x01, 0x00, 2, 8)
280 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SSSE3, 0x01, 0x00, 2, 9)
281 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(CNXT_ID, 0x01, 0x00, 2, 10)
282 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(FMA, 0x01, 0x00, 2, 12)
283 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(CX16, 0x01, 0x00, 2, 13)
284 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(XTPR, 0x01, 0x00, 2, 14)
285 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PDCM, 0x01, 0x00, 2, 15)
286 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PCID, 0x01, 0x00, 2, 17)
287 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(DCA, 0x01, 0x00, 2, 18)
288 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SSE4_1, 0x01, 0x00, 2, 19)
289 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SSE4_2, 0x01, 0x00, 2, 20)
290 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(X2APIC, 0x01, 0x00, 2, 21)
291 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MOVBE, 0x01, 0x00, 2, 22)
292 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(POPCNT, 0x01, 0x00, 2, 23)
293 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(TSC_DEADLINE, 0x01, 0x00, 2, 24)
294 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AES, 0x01, 0x00, 2, 25)
295 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(XSAVE, 0x01, 0x00, 2, 26)
296 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(OSXSAVE, 0x01, 0x00, 2, 27)
297 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX, 0x01, 0x00, 2, 28)
298 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(F16C, 0x01, 0x00, 2, 29)
299 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(RDRAND, 0x01, 0x00, 2, 30)
300 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(HYPERVISOR, 0x01, 0x00, 2, 31)
301 
302 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(FPU, 0x01, 0x00, 3, 0)
303 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(VME, 0x01, 0x00, 3, 1)
304 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(DE, 0x01, 0x00, 3, 2)
305 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PSE, 0x01, 0x00, 3, 3)
306 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(TSC, 0x01, 0x00, 3, 4)
307 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MSR, 0x01, 0x00, 3, 5)
308 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PAE, 0x01, 0x00, 3, 6)
309 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MCE, 0x01, 0x00, 3, 7)
310 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(CX8, 0x01, 0x00, 3, 8)
311 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(APIC, 0x01, 0x00, 3, 9)
312 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SEP, 0x01, 0x00, 3, 11)
313 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MTRR, 0x01, 0x00, 3, 12)
314 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PGE, 0x01, 0x00, 3, 13)
315 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MCA, 0x01, 0x00, 3, 14)
316 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(CMOV, 0x01, 0x00, 3, 15)
317 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PAT, 0x01, 0x00, 3, 16)
318 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PSE_36, 0x01, 0x00, 3, 17)
319 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PSN, 0x01, 0x00, 3, 18)
320 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(CLFSH, 0x01, 0x00, 3, 19)
321 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(DS, 0x01, 0x00, 3, 21)
322 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(ACPI, 0x01, 0x00, 3, 22)
323 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MMX, 0x01, 0x00, 3, 23)
324 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(FXSR, 0x01, 0x00, 3, 24)
325 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SSE, 0x01, 0x00, 3, 25)
326 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SSE2, 0x01, 0x00, 3, 26)
327 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SS, 0x01, 0x00, 3, 27)
328 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(HTT, 0x01, 0x00, 3, 28)
329 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(TM, 0x01, 0x00, 3, 29)
330 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(IA64, 0x01, 0x00, 3, 30)
331 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PBE, 0x01, 0x00, 3, 31)
332 
333 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(FSGSBASE, 0x07, 0x00, 1, 0)
334 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(BMI1, 0x07, 0x00, 1, 3)
335 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(HLE, 0x07, 0x00, 1, 4)
336 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX2, 0x07, 0x00, 1, 5)
337 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SMEP, 0x07, 0x00, 1, 7)
338 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(BMI2, 0x07, 0x00, 1, 8)
339 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(ERMS, 0x07, 0x00, 1, 9)
340 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(INVPCID, 0x07, 0x00, 1, 10)
341 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(RTM, 0x07, 0x00, 1, 11)
342 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(MPX, 0x07, 0x00, 1, 14)
343 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512F, 0x07, 0x00, 1, 16)
344 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512DQ, 0x07, 0x00, 1, 17)
345 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(RDSEED, 0x07, 0x00, 1, 18)
346 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(ADX, 0x07, 0x00, 1, 19)
347 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SMAP, 0x07, 0x00, 1, 20)
348 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512IFMA52, 0x07, 0x00, 1, 21)
349 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(CLFLUSHOPT, 0x07, 0x00, 1, 23)
350 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(INTEL_TRACE, 0x07, 0x00, 1, 25)
351 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512PF, 0x07, 0x00, 1, 26)
352 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512ER, 0x07, 0x00, 1, 27)
353 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512CD, 0x07, 0x00, 1, 28)
354 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(SHA, 0x07, 0x00, 1, 29)
355 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512BW, 0x07, 0x00, 1, 30)
356 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512VL, 0x07, 0x00, 1, 31)
357 
358 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(PREFETCHWT1, 0x07, 0x00, 3, 0)
359 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(AVX512VBMI, 0x07, 0x00, 3, 1)
360 
361 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(LAHF_LM, 0x01, 0x00, 2, 0)
362 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(CMP_LEGACY, 0x01, 0x00, 2, 1)
363 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(SVM, 0x01, 0x00, 2, 2)
364 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(EXTAPIC, 0x01, 0x00, 2, 3)
365 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(CR8_LEGACY, 0x01, 0x00, 2, 4)
366 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(ABM, 0x01, 0x00, 2, 5)
367 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(SSE4A, 0x01, 0x00, 2, 6)
368 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MISALIGNSSE, 0x01, 0x00, 2, 7)
369 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(3DNOWPREFETCH, 0x01, 0x00, 2, 8)
370 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(OSVW, 0x01, 0x00, 2, 9)
371 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(IBS, 0x01, 0x00, 2, 10)
372 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(XOP, 0x01, 0x00, 2, 11)
373 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(SKINIT, 0x01, 0x00, 2, 12)
374 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(WDT, 0x01, 0x00, 2, 13)
375 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(LWP, 0x01, 0x00, 2, 15)
376 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(FMA4, 0x01, 0x00, 2, 16)
377 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(TCE, 0x01, 0x00, 2, 17)
378 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(NODEID_MSR, 0x01, 0x00, 2, 19)
379 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(TBM, 0x01, 0x00, 2, 21)
380 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(TOPOEXT, 0x01, 0x00, 2, 22)
381 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PERFCTR_CORE, 0x01, 0x00, 2, 23)
382 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PERFCTR_NB, 0x01, 0x00, 2, 24)
383 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(DBX, 0x01, 0x00, 2, 26)
384 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PERFTSC, 0x01, 0x00, 2, 27)
385 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PCX_L2I, 0x01, 0x00, 2, 28)
386 
387 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(FPU, 0x01, 0x00, 3, 0)
388 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(VME, 0x01, 0x00, 3, 1)
389 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(DE, 0x01, 0x00, 3, 2)
390 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PSE, 0x01, 0x00, 3, 3)
391 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(TSC, 0x01, 0x00, 3, 4)
392 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MSR, 0x01, 0x00, 3, 5)
393 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PAE, 0x01, 0x00, 3, 6)
394 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MCE, 0x01, 0x00, 3, 7)
395 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(CX8, 0x01, 0x00, 3, 8)
396 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(APIC, 0x01, 0x00, 3, 9)
397 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(SYSCALL, 0x01, 0x00, 3, 11)
398 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MTRR, 0x01, 0x00, 3, 12)
399 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PGE, 0x01, 0x00, 3, 13)
400 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MCA, 0x01, 0x00, 3, 14)
401 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(CMOV, 0x01, 0x00, 3, 15)
402 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PAT, 0x01, 0x00, 3, 16)
403 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(PSE36, 0x01, 0x00, 3, 17)
404 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MP, 0x01, 0x00, 3, 19)
405 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(NX, 0x01, 0x00, 3, 20)
406 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MMX, 0x01, 0x00, 3, 22)
407 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(MMXEXT, 0x01, 0x00, 3, 23)
408 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(FXSR, 0x01, 0x00, 3, 24)
409 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(FXSR_OPT, 0x01, 0x00, 3, 25)
410 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(GBPAGES, 0x01, 0x00, 3, 26)
411 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(RDTSCP, 0x01, 0x00, 3, 27)
412 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(LM, 0x01, 0x00, 3, 29)
413 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(3DNOWEXT, 0x01, 0x00, 3, 30)
414 VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(3DNOW, 0x01, 0x00, 3, 31)
415 
422 class CPUID
423 {
424  public :
425 
427  typedef Array<unsigned, 4> reg_type;
428 
430  struct cache_param_type
431  {
432  cache_param_type (const reg_type &reg) :
433  level_(0), max_proc_sharing_(0), max_proc_physical_(0),
434  line_size_(0), partitions_(0), ways_(0), sets_(0),
435  self_initializing_(false), fully_associative_(false),
436  wbinvd_(false), inclusiveness_(false), complex_indexing_(false)
437  {
438  unsigned t = extract_bits<4, 0>(reg.at<0>());
439  switch (t) {
440  case 1 :
441  type_ = CPUIDCacheTypeData;
442  break;
443  case 2 :
444  type_ = CPUIDCacheTypeInstruction;
445  break;
446  case 3 :
447  type_ = CPUIDCacheTypeUnified;
448  break;
449  default :
450  type_ = CPUIDCacheTypeNull;
451  return;
452  }
453 
454  level_ = extract_bits<7, 5>(reg.at<0>());
455  self_initializing_ = test_bit<8>(reg.at<0>());
456  fully_associative_ = test_bit<9>(reg.at<0>());
457  max_proc_sharing_ = extract_bits<25, 14>(reg.at<0>()) + 1;
458  max_proc_physical_ = extract_bits<31, 26>(reg.at<0>()) + 1;
459 
460  line_size_ = extract_bits<11, 0>(reg.at<1>()) + 1;
461  partitions_ = extract_bits<21, 12>(reg.at<1>()) + 1;
462  ways_ = extract_bits<31, 22>(reg.at<1>()) + 1;
463  sets_ = extract_bits<31, 0>(reg.at<2>()) + 1;
464  size_ = line_size_ * partitions_ * ways_ * sets_;
465 
466  wbinvd_ = test_bit<0>(reg.at<3>());
467  inclusiveness_ = test_bit<1>(reg.at<3>());
468  complex_indexing_ = test_bit<2>(reg.at<3>());
469  }
470 
472  CPUIDCacheType type () const {return type_;}
473 
475  unsigned level () const {return level_;}
476 
479  unsigned max_proc_sharing () const {return max_proc_sharing_;}
480 
483  unsigned max_proc_physical () const {return max_proc_physical_;}
484 
486  unsigned line_size () const {return line_size_;}
487 
489  unsigned partitions () const {return partitions_;}
490 
492  unsigned ways () const {return ways_;}
493 
495  unsigned sets () const {return sets_;}
496 
498  unsigned size () const {return size_;}
499 
501  bool self_initializing () const {return self_initializing_;}
502 
504  bool fully_associative () const {return fully_associative_;}
505 
508  bool wbinvd () const {return wbinvd_;}
509 
511  bool inclusiveness () const {return inclusiveness_;}
512 
514  bool complex_indexing () const {return complex_indexing_;}
515 
516  private :
517 
518  CPUIDCacheType type_;
519  unsigned level_;
520  unsigned max_proc_sharing_;
521  unsigned max_proc_physical_;
522  unsigned line_size_;
523  unsigned partitions_;
524  unsigned ways_;
525  unsigned sets_;
526  unsigned size_;
527  bool self_initializing_;
528  bool fully_associative_;
529  bool wbinvd_;
530  bool inclusiveness_;
531  bool complex_indexing_;
532  }; // struct cache_param_type
533 
535  template <typename CharT, typename Traits>
536  static std::basic_ostream<CharT, Traits> &info (
537  std::basic_ostream<CharT, Traits> &os)
538  {
539  if (!os.good())
540  return os;
541 
542  print_equal(os);
543  os << "Vendor ID " << vendor() << '\n';
544  if (max_eax_ext() >= ext0_ + 4U)
545  os << "Processor brand " << brand() << '\n';
546  if (max_eax() >= 0x16) {
547  os << "Base frequency (MHz) " << base_freq() << '\n';
548  os << "Maximum frequency (MHz) " << max_freq() << '\n';
549  os << "Bus frequency (MHz) " << bus_freq() << '\n';
550  }
551  if (max_eax() >= 0x04) {
552  print_equal(os);
553  os << "Deterministic cache parameters\n";
554  print_dash(os);
555  print_cache(os);
556  }
557  print_equal(os);
558  print_feature(os);
559  print_equal(os);
560 
561  return os;
562  }
563 
570  template <unsigned EAX, unsigned ECX>
571  static const reg_type &info ()
572  {
573  static reg_type reg(info_dispatch<EAX, ECX>(
574  cxx11::integral_constant<bool,
575  EAX == 0x00 || EAX == ext0_>(),
576  cxx11::integral_constant<bool, EAX < ext0_>()));
577 
578  return reg;
579  }
580 
582  static unsigned max_eax ()
583  {return info<0x00, 0x00>().at<0>();}
584 
586  static unsigned max_eax_ext ()
587  {return info<ext0_, 0x00>().at<0>();}
588 
590  static std::string vendor ()
591  {
592  reg_type reg(info<0x00, 0x00>());
593  const unsigned *uptr = reg.data();
594  char str[sizeof(unsigned) * 3 + 1] = {'\0'};
595  std::memcpy(str + sizeof(unsigned) * 0, uptr + 1, sizeof(unsigned));
596  std::memcpy(str + sizeof(unsigned) * 1, uptr + 3, sizeof(unsigned));
597  std::memcpy(str + sizeof(unsigned) * 2, uptr + 2, sizeof(unsigned));
598 
599  return std::string(str);
600  }
601 
604  static std::string brand ()
605  {
606  reg_type reg2(info<ext0_ + 2U, 0>());
607  reg_type reg3(info<ext0_ + 3U, 0>());
608  reg_type reg4(info<ext0_ + 4U, 0>());
609  const std::size_t reg_size = sizeof(unsigned) * 4;
610  char str[reg_size * 3] = {'\0'};
611  std::memcpy(str + reg_size * 0, reg2.data(), reg_size);
612  std::memcpy(str + reg_size * 1, reg3.data(), reg_size);
613  std::memcpy(str + reg_size * 2, reg4.data(), reg_size);
614 
615  return std::string(str);
616  }
617 
619  static unsigned cache_param_num ()
620  {
621  reg_type reg;
622  unsigned ecx = 0x00;
623  while (true) {
624  cpuid(0x04, ecx, reg.data());
625  if (extract_bits<4, 0>(reg.at<0>()) == 0)
626  break;
627  ++ecx;
628  }
629 
630  return ecx;
631  }
632 
637  static cache_param_type cache_param (unsigned cache_index)
638  {
639  reg_type reg;
640  cpuid(0x04, cache_index, reg.data());
641 
642  return cache_param_type(reg);
643  }
644 
646  static bool intel_turbo_boost ()
647  {return test_bit<1>(info<0x06, 0x00>().at<0>());}
648 
650  static unsigned base_freq ()
651  {return extract_bits<15, 0>(info<0x16, 0x00>().at<0>());}
652 
654  static unsigned max_freq ()
655  {return extract_bits<15, 0>(info<0x16, 0x00>().at<1>());}
656 
658  static unsigned bus_freq ()
659  {return extract_bits<15, 0>(info<0x16, 0x00>().at<2>());}
660 
662  template <CPUIDFeature Feat>
663  static bool has_feature ()
664  {
665  return test_bit<CPUIDFeatureInfo<Feat>::bit>(info<
666  CPUIDFeatureInfo<Feat>::eax, CPUIDFeatureInfo<Feat>::ecx
667  >().template at<CPUIDFeatureInfo<Feat>::index>());
668  }
669 
670  private :
671 
672  static VSMC_CONSTEXPR const unsigned ext0_ = 0x80000000U;
673 
674  template <unsigned, unsigned>
675  static reg_type info_dispatch (cxx11::true_type, cxx11::true_type)
676  {
677  reg_type reg;
678  cpuid(0x00, 0x00, reg.data());
679 
680  return reg;
681  }
682 
683  template <unsigned, unsigned>
684  static reg_type info_dispatch (cxx11::true_type, cxx11::false_type)
685  {
686  reg_type reg;
687  cpuid(ext0_, 0x00, reg.data());
688 
689  return reg;
690  }
691 
692  template <unsigned EAX, unsigned ECX, bool Basic>
693  static reg_type info_dispatch (cxx11::false_type,
694  cxx11::integral_constant<bool, Basic>)
695  {
696  reg_type reg(info_dispatch<EAX, ECX>(cxx11::true_type(),
697  cxx11::integral_constant<bool, Basic>()));
698 
699  if (EAX > reg.at<0>())
700  reg.fill(0);
701  else
702  cpuid(EAX, ECX, reg.data());
703 
704  return reg;
705  }
706 
707  template <unsigned Hi, unsigned Lo>
708  static unsigned extract_bits (unsigned val)
709  {return (val << (31U - Hi)) >> (31U - Hi + Lo);}
710 
711  template <unsigned Bit>
712  static bool test_bit (unsigned val)
713  {return (val & (1U << Bit)) != 0;}
714 
715  template <typename CharT, typename Traits>
716  static void print_equal (std::basic_ostream<CharT, Traits> &os)
717  {os << std::string(90, '=') << '\n';}
718 
719  template <typename CharT, typename Traits>
720  static void print_dash (std::basic_ostream<CharT, Traits> &os)
721  {os << std::string(90, '-') << '\n';}
722 
723  template <typename CharT, typename Traits>
724  static void print_cache (std::basic_ostream<CharT, Traits> &os)
725  {
726  std::vector<cache_param_type> caches;
727  unsigned max_ecx = cache_param_num();
728  for (unsigned ecx = 0x00; ecx != max_ecx; ++ecx)
729  caches.push_back(cache_param(ecx));
730 
731  const std::size_t fix = 12;
732  std::stringstream ss;
733 
734  os << "Cache level ";
735  for (std::size_t i = 0; i != caches.size(); ++i)
736  os << std::setw(fix) << caches[i].level();
737  os << '\n';
738 
739  os << "Cache type ";
740  for (std::size_t i = 0; i != caches.size(); ++i) {
741  switch (caches[i].type()) {
742  case CPUIDCacheTypeNull :
743  break;
744  case CPUIDCacheTypeData :
745  os << std::setw(fix) << "Data";
746  break;
747  case CPUIDCacheTypeInstruction :
748  os << std::setw(fix) << "Instruction";
749  break;
750  case CPUIDCacheTypeUnified :
751  os << std::setw(fix) << "Unified";
752  break;
753  }
754  }
755  os << '\n';
756 
757  os << "Cache size (byte) ";
758  for (std::size_t i = 0; i != caches.size(); ++i) {
759  unsigned b = caches[i].size();
760  ss.str(std::string());
761  if (b < 1024) {
762  ss << b;
763  } else if ((b /= 1024) < 1024) {
764  ss << b << "K";
765  } else if ((b /= 1024) < 1024) {
766  ss << b << "M";
767  } else {
768  ss << b / 1024 << "G";
769  }
770  os << std::setw(fix) << ss.str();
771  }
772  os << '\n';
773 
774  os << "Maximum Proc sharing ";
775  for (std::size_t i = 0; i != caches.size(); ++i)
776  os << std::setw(fix) << caches[i].max_proc_sharing();
777  os << '\n';
778 
779  os << "Maximum Proc physical ";
780  for (std::size_t i = 0; i != caches.size(); ++i)
781  os << std::setw(fix) << caches[i].max_proc_physical();
782  os << '\n';
783 
784  os << "Coherency line size (byte) ";
785  for (std::size_t i = 0; i != caches.size(); ++i)
786  os << std::setw(fix) << caches[i].line_size();
787  os << '\n';
788 
789  os << "Physical line partitions ";
790  for (std::size_t i = 0; i != caches.size(); ++i)
791  os << std::setw(fix) << caches[i].partitions();
792  os << '\n';
793 
794  os << "Ways of associative ";
795  for (std::size_t i = 0; i != caches.size(); ++i)
796  os << std::setw(fix) << caches[i].ways();
797  os << '\n';
798 
799  os << "Number of sets ";
800  for (std::size_t i = 0; i != caches.size(); ++i)
801  os << std::setw(fix) << caches[i].sets();
802  os << '\n';
803 
804  os << "Self initializing ";
805  for (std::size_t i = 0; i != caches.size(); ++i) {
806  os << std::setw(fix)
807  << (caches[i].self_initializing() ? "Yes" : "No");
808  }
809  os << '\n';
810 
811  os << "Fully associative ";
812  for (std::size_t i = 0; i != caches.size(); ++i) {
813  os << std::setw(fix)
814  << (caches[i].fully_associative() ? "Yes" : "No");
815  }
816  os << '\n';
817 
818  os << "Write-back invalidate ";
819  for (std::size_t i = 0; i != caches.size(); ++i) {
820  os << std::setw(fix)
821  << (caches[i].wbinvd() ? "Yes" : "No");
822  }
823  os << '\n';
824 
825  os << "Cache inclusiveness ";
826  for (std::size_t i = 0; i != caches.size(); ++i) {
827  os << std::setw(fix)
828  << (caches[i].inclusiveness() ? "Yes" : "No");
829  }
830  os << '\n';
831 
832  os << "Complex cache indexing ";
833  for (std::size_t i = 0; i != caches.size(); ++i) {
834  os << std::setw(fix)
835  << (caches[i].complex_indexing() ? "Yes" : "No");
836  }
837  os << '\n';
838  }
839 
840  template <typename CharT, typename Traits>
841  static void print_feature (std::basic_ostream<CharT, Traits> &os)
842  {
843  if (max_eax() >= 0x01) {
844  std::vector<std::string> feats;
845  feature_str1(feats);
846  if (feats.size() != 0) {
847  os << "Processor info and features\n";
848  print_dash(os);
849  print_feature(os, feats);
850  }
851  }
852  if (max_eax() >= 0x07) {
853  std::vector<std::string> feats;
854  feature_str7(feats);
855  if (feats.size() != 0) {
856  print_equal(os);
857  os << "Extended features\n";
858  print_dash(os);
859  print_feature(os, feats);
860  }
861  }
862  if (max_eax_ext() >= ext0_ + 1U) {
863  std::vector<std::string> feats;
864  feature_str_ext1(feats);
865  if (feats.size() != 0) {
866  print_equal(os);
867  os << "Extended processor info and features\n";
868  print_dash(os);
869  print_feature(os, feats);
870  }
871  }
872  }
873 
874  template <typename CharT, typename Traits>
875  static void print_feature (std::basic_ostream<CharT, Traits> &os,
876  std::vector<std::string> &feats)
877  {
878  std::sort(feats.begin(), feats.end());
879  for (std::size_t i = 0; i != feats.size(); ++i) {
880  print_feat(os, feats[i], 15);
881  if (i % 6 == 5 || i == feats.size() - 1)
882  os << '\n';
883  }
884  }
885 
886  template <typename CharT, typename Traits>
887  static void print_feat (std::basic_ostream<CharT, Traits> &os,
888  std::string &str, std::size_t fix)
889  {
890  os << str;
891  if (str.size() < fix)
892  os << std::string(fix - str.size(), ' ');
893  }
894 
895  static void feature_str1 (std::vector<std::string> &feats)
896  {
897  feature_str<CPUIDFeatureSSE3> (feats);
898  feature_str<CPUIDFeaturePCLMULQDQ> (feats);
899  feature_str<CPUIDFeatureDTES64> (feats);
900  feature_str<CPUIDFeatureMONITOR> (feats);
901  feature_str<CPUIDFeatureDS_CPL> (feats);
902  feature_str<CPUIDFeatureVMX> (feats);
903  feature_str<CPUIDFeatureSMX> (feats);
904  feature_str<CPUIDFeatureEST> (feats);
905  feature_str<CPUIDFeatureTM2> (feats);
906  feature_str<CPUIDFeatureSSSE3> (feats);
907  feature_str<CPUIDFeatureCNXT_ID> (feats);
908  feature_str<CPUIDFeatureFMA> (feats);
909  feature_str<CPUIDFeatureCX16> (feats);
910  feature_str<CPUIDFeatureXTPR> (feats);
911  feature_str<CPUIDFeaturePDCM> (feats);
912  feature_str<CPUIDFeaturePCID> (feats);
913  feature_str<CPUIDFeatureDCA> (feats);
914  feature_str<CPUIDFeatureSSE4_1> (feats);
915  feature_str<CPUIDFeatureSSE4_2> (feats);
916  feature_str<CPUIDFeatureX2APIC> (feats);
917  feature_str<CPUIDFeatureMOVBE> (feats);
918  feature_str<CPUIDFeaturePOPCNT> (feats);
919  feature_str<CPUIDFeatureTSC_DEADLINE>(feats);
920  feature_str<CPUIDFeatureAES> (feats);
921  feature_str<CPUIDFeatureXSAVE> (feats);
922  feature_str<CPUIDFeatureOSXSAVE> (feats);
923  feature_str<CPUIDFeatureAVX> (feats);
924  feature_str<CPUIDFeatureF16C> (feats);
925  feature_str<CPUIDFeatureRDRAND> (feats);
926  feature_str<CPUIDFeatureHYPERVISOR> (feats);
927 
928  feature_str<CPUIDFeatureFPU> (feats);
929  feature_str<CPUIDFeatureVME> (feats);
930  feature_str<CPUIDFeatureDE> (feats);
931  feature_str<CPUIDFeaturePSE> (feats);
932  feature_str<CPUIDFeatureTSC> (feats);
933  feature_str<CPUIDFeatureMSR> (feats);
934  feature_str<CPUIDFeaturePAE> (feats);
935  feature_str<CPUIDFeatureMCE> (feats);
936  feature_str<CPUIDFeatureCX8> (feats);
937  feature_str<CPUIDFeatureAPIC> (feats);
938  feature_str<CPUIDFeatureSEP> (feats);
939  feature_str<CPUIDFeatureMTRR> (feats);
940  feature_str<CPUIDFeaturePGE> (feats);
941  feature_str<CPUIDFeatureMCA> (feats);
942  feature_str<CPUIDFeatureCMOV> (feats);
943  feature_str<CPUIDFeaturePAT> (feats);
944  feature_str<CPUIDFeaturePSE_36> (feats);
945  feature_str<CPUIDFeaturePSN> (feats);
946  feature_str<CPUIDFeatureCLFSH> (feats);
947  feature_str<CPUIDFeatureDS> (feats);
948  feature_str<CPUIDFeatureACPI> (feats);
949  feature_str<CPUIDFeatureMMX> (feats);
950  feature_str<CPUIDFeatureFXSR> (feats);
951  feature_str<CPUIDFeatureSSE> (feats);
952  feature_str<CPUIDFeatureSSE2> (feats);
953  feature_str<CPUIDFeatureSS> (feats);
954  feature_str<CPUIDFeatureHTT> (feats);
955  feature_str<CPUIDFeatureTM> (feats);
956  feature_str<CPUIDFeatureIA64> (feats);
957  feature_str<CPUIDFeaturePBE> (feats);
958  }
959 
960  static void feature_str7 (std::vector<std::string> &feats)
961  {
962  feature_str<CPUIDFeatureFSGSBASE> (feats);
963  feature_str<CPUIDFeatureBMI1> (feats);
964  feature_str<CPUIDFeatureHLE> (feats);
965  feature_str<CPUIDFeatureAVX2> (feats);
966  feature_str<CPUIDFeatureSMEP> (feats);
967  feature_str<CPUIDFeatureBMI2> (feats);
968  feature_str<CPUIDFeatureERMS> (feats);
969  feature_str<CPUIDFeatureINVPCID> (feats);
970  feature_str<CPUIDFeatureRTM> (feats);
971  feature_str<CPUIDFeatureMPX> (feats);
972  feature_str<CPUIDFeatureAVX512F> (feats);
973  feature_str<CPUIDFeatureAVX512DQ> (feats);
974  feature_str<CPUIDFeatureRDSEED> (feats);
975  feature_str<CPUIDFeatureADX> (feats);
976  feature_str<CPUIDFeatureSMAP> (feats);
977  feature_str<CPUIDFeatureAVX512IFMA52>(feats);
978  feature_str<CPUIDFeatureCLFLUSHOPT> (feats);
979  feature_str<CPUIDFeatureINTEL_TRACE> (feats);
980  feature_str<CPUIDFeatureAVX512PF> (feats);
981  feature_str<CPUIDFeatureAVX512ER> (feats);
982  feature_str<CPUIDFeatureAVX512CD> (feats);
983  feature_str<CPUIDFeatureSHA> (feats);
984  feature_str<CPUIDFeatureAVX512BW> (feats);
985  feature_str<CPUIDFeatureAVX512VL> (feats);
986 
987  feature_str<CPUIDFeaturePREFETCHWT1> (feats);
988  feature_str<CPUIDFeatureAVX512VBMI> (feats);
989  }
990 
991  static void feature_str_ext1 (std::vector<std::string> &feats)
992  {
993  feature_str<CPUIDFeatureExtLAHF_LM> (feats);
994  feature_str<CPUIDFeatureExtCMP_LEGACY> (feats);
995  feature_str<CPUIDFeatureExtSVM> (feats);
996  feature_str<CPUIDFeatureExtEXTAPIC> (feats);
997  feature_str<CPUIDFeatureExtCR8_LEGACY> (feats);
998  feature_str<CPUIDFeatureExtABM> (feats);
999  feature_str<CPUIDFeatureExtSSE4A> (feats);
1000  feature_str<CPUIDFeatureExtMISALIGNSSE> (feats);
1001  feature_str<CPUIDFeatureExt3DNOWPREFETCH>(feats);
1002  feature_str<CPUIDFeatureExtOSVW> (feats);
1003  feature_str<CPUIDFeatureExtIBS> (feats);
1004  feature_str<CPUIDFeatureExtXOP> (feats);
1005  feature_str<CPUIDFeatureExtSKINIT> (feats);
1006  feature_str<CPUIDFeatureExtWDT> (feats);
1007  feature_str<CPUIDFeatureExtLWP> (feats);
1008  feature_str<CPUIDFeatureExtFMA4> (feats);
1009  feature_str<CPUIDFeatureExtTCE> (feats);
1010  feature_str<CPUIDFeatureExtNODEID_MSR> (feats);
1011  feature_str<CPUIDFeatureExtTBM> (feats);
1012  feature_str<CPUIDFeatureExtTOPOEXT> (feats);
1013  feature_str<CPUIDFeatureExtPERFCTR_CORE> (feats);
1014  feature_str<CPUIDFeatureExtPERFCTR_NB> (feats);
1015  feature_str<CPUIDFeatureExtDBX> (feats);
1016  feature_str<CPUIDFeatureExtPERFTSC> (feats);
1017  feature_str<CPUIDFeatureExtPCX_L2I> (feats);
1018 
1019  feature_str<CPUIDFeatureExtFPU> (feats);
1020  feature_str<CPUIDFeatureExtVME> (feats);
1021  feature_str<CPUIDFeatureExtDE> (feats);
1022  feature_str<CPUIDFeatureExtPSE> (feats);
1023  feature_str<CPUIDFeatureExtTSC> (feats);
1024  feature_str<CPUIDFeatureExtMSR> (feats);
1025  feature_str<CPUIDFeatureExtPAE> (feats);
1026  feature_str<CPUIDFeatureExtMCE> (feats);
1027  feature_str<CPUIDFeatureExtCX8> (feats);
1028  feature_str<CPUIDFeatureExtAPIC> (feats);
1029  feature_str<CPUIDFeatureExtSYSCALL> (feats);
1030  feature_str<CPUIDFeatureExtMTRR> (feats);
1031  feature_str<CPUIDFeatureExtPGE> (feats);
1032  feature_str<CPUIDFeatureExtMCA> (feats);
1033  feature_str<CPUIDFeatureExtCMOV> (feats);
1034  feature_str<CPUIDFeatureExtPAT> (feats);
1035  feature_str<CPUIDFeatureExtPSE36> (feats);
1036  feature_str<CPUIDFeatureExtMP> (feats);
1037  feature_str<CPUIDFeatureExtNX> (feats);
1038  feature_str<CPUIDFeatureExtMMX> (feats);
1039  feature_str<CPUIDFeatureExtMMXEXT> (feats);
1040  feature_str<CPUIDFeatureExtFXSR> (feats);
1041  feature_str<CPUIDFeatureExtFXSR_OPT> (feats);
1042  feature_str<CPUIDFeatureExtGBPAGES> (feats);
1043  feature_str<CPUIDFeatureExtRDTSCP> (feats);
1044  feature_str<CPUIDFeatureExtLM> (feats);
1045  feature_str<CPUIDFeatureExt3DNOWEXT> (feats);
1046  feature_str<CPUIDFeatureExt3DNOW> (feats);
1047  }
1048 
1049  template <CPUIDFeature Feat>
1050  static void feature_str (std::vector<std::string> &feats)
1051  {
1052  if (has_feature<Feat>())
1053  feats.push_back(CPUIDFeatureInfo<Feat>::str());
1054  }
1055 }; // class CPUID
1056 
1059 template <typename CharT, typename Traits>
1060 inline std::basic_ostream<CharT, Traits> &operator<< (
1061  std::basic_ostream<CharT, Traits> &os, const CPUID &)
1062 {return CPUID::info(os);}
1063 
1064 } // namespace vsmc
1065 
1066 #endif // VSMC_UTILITY_CPUID_HPP
vsmc::CPUIDFeatureSHA
EAX = 0x07, ECX = 0x00; EBX[29].
Definition: cpuid.hpp:175
vsmc::CPUIDFeatureCNXT_ID
EAX = 0x01, ECX = 0x00; ECX[10].
Definition: cpuid.hpp:102
vsmc
Definition: adapter.hpp:37
vsmc::CPUIDFeatureAVX512VBMI
EAX = 0x07, ECX = 0x00; ECX[01].
Definition: cpuid.hpp:180
vsmc::CPUIDFeatureSSE2
EAX = 0x01, ECX = 0x00; EDX[26].
Definition: cpuid.hpp:147
vsmc::CPUIDFeatureExtPERFCTR_CORE
EAX = 0x80000001, ECX = 0x00; ECX[23].
Definition: cpuid.hpp:202
VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO
#define VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO(feat, a, c, i, b)
Definition: cpuid.hpp:42
vsmc::CPUIDFeatureHLE
EAX = 0x07, ECX = 0x00; EBX[04].
Definition: cpuid.hpp:156
vsmc::CPUIDFeatureSSSE3
EAX = 0x01, ECX = 0x00; ECX[09].
Definition: cpuid.hpp:101
vsmc::CPUIDFeatureSSE3
EAX = 0x01, ECX = 0x00; ECX[00].
Definition: cpuid.hpp:92
vsmc::CPUIDFeatureAVX2
EAX = 0x07, ECX = 0x00; EBX[05].
Definition: cpuid.hpp:157
vsmc::CPUIDFeatureSSE4_1
EAX = 0x01, ECX = 0x00; ECX[19].
Definition: cpuid.hpp:109
vsmc::CPUIDFeatureExtMCE
EAX = 0x80000001, ECX = 0x00; EDX[07].
Definition: cpuid.hpp:215
vsmc::CPUID::info
static const reg_type & info()
Get the CPUID information stored in EAX, EBX, ECX and EDX, given input EAX and ECX values...
Definition: cpuid.hpp:571
vsmc::CPUIDFeatureInfo::eax
static constexpr const unsigned eax
The value of the calling parameter EAX.
Definition: cpuid.hpp:259
VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT
#define VSMC_DEFINE_UTILITY_CPUID_FEATURE_INFO_EXT(feat, a, c, i, b)
Definition: cpuid.hpp:52
vsmc::CPUID::vendor
static std::string vendor()
Vendor ID (EAX = 0x00; EBX, EDX, ECX)
Definition: cpuid.hpp:590
vsmc::CPUIDFeatureExtPAE
EAX = 0x80000001, ECX = 0x00; EDX[06].
Definition: cpuid.hpp:214
vsmc::CPUIDFeatureExtFPU
EAX = 0x80000001, ECX = 0x00; EDX[00].
Definition: cpuid.hpp:208
vsmc::CPUIDFeatureTM2
EAX = 0x01, ECX = 0x00; ECX[08].
Definition: cpuid.hpp:100
vsmc::CPUIDFeatureExtCR8_LEGACY
EAX = 0x80000001, ECX = 0x00; ECX[04].
Definition: cpuid.hpp:186
vsmc::CPUIDFeatureExtNODEID_MSR
EAX = 0x80000001, ECX = 0x00; ECX[19].
Definition: cpuid.hpp:199
vsmc::CPUIDFeatureExtFMA4
EAX = 0x80000001, ECX = 0x00; ECX[16].
Definition: cpuid.hpp:197
vsmc::CPUIDFeatureADX
EAX = 0x07, ECX = 0x00; EBX[19].
Definition: cpuid.hpp:167
vsmc::CPUIDFeatureExtRDTSCP
EAX = 0x80000001, ECX = 0x00; EDX[27].
Definition: cpuid.hpp:232
vsmc::CPUIDFeatureExtTCE
EAX = 0x80000001, ECX = 0x00; ECX[17].
Definition: cpuid.hpp:198
vsmc::CPUIDFeatureExt3DNOW
EAX = 0x80000001, ECX = 0x00; EDX[31].
Definition: cpuid.hpp:235
vsmc::CPUIDFeatureExtDBX
EAX = 0x80000001, ECX = 0x00; ECX[26].
Definition: cpuid.hpp:204
vsmc::CPUIDFeatureInfo::index
static constexpr const unsigned index
The index of in CPUID::reg_type of the output register.
Definition: cpuid.hpp:265
VSMC_CONSTEXPR
#define VSMC_CONSTEXPR
constexpr
Definition: defines.hpp:55
vsmc::CPUIDFeatureTSC
EAX = 0x01, ECX = 0x00; EDX[04].
Definition: cpuid.hpp:127
vsmc::CPUID::cache_param_type::inclusiveness
bool inclusiveness() const
Cache inclusiveness.
Definition: cpuid.hpp:511
vsmc::CPUIDFeatureExtLM
EAX = 0x80000001, ECX = 0x00; EDX[29].
Definition: cpuid.hpp:233
vsmc::SSE3
Definition: defines.hpp:92
vsmc::CPUIDFeatureExtMCA
EAX = 0x80000001, ECX = 0x00; EDX[14].
Definition: cpuid.hpp:221
vsmc::CPUIDCacheTypeUnified
Unified cache.
Definition: cpuid.hpp:244
vsmc::CPUIDFeatureExtWDT
EAX = 0x80000001, ECX = 0x00; ECX[13].
Definition: cpuid.hpp:195
vsmc::CPUIDFeaturePBE
EAX = 0x01, ECX = 0x00; EDX[31].
Definition: cpuid.hpp:152
vsmc::CPUIDFeaturePSE_36
EAX = 0x01, ECX = 0x00; EDX[17].
Definition: cpuid.hpp:139
vsmc::CPUIDFeatureExtPCX_L2I
EAX = 0x80000001, ECX = 0x00; ECX[28].
Definition: cpuid.hpp:206
vsmc::CPUIDFeatureDE
EAX = 0x01, ECX = 0x00; EDX[02].
Definition: cpuid.hpp:125
vsmc::CPUIDFeatureX2APIC
EAX = 0x01, ECX = 0x00; ECX[21].
Definition: cpuid.hpp:111
vsmc::CPUID::cache_param_type::line_size
unsigned line_size() const
Coherency line size in byte.
Definition: cpuid.hpp:486
vsmc::CPUIDFeatureExtFXSR
EAX = 0x80000001, ECX = 0x00; EDX[24].
Definition: cpuid.hpp:229
vsmc::CPUIDFeatureRTM
EAX = 0x07, ECX = 0x00; EBX[11].
Definition: cpuid.hpp:162
vsmc::CPUID::cache_param_type::type
CPUIDCacheType type() const
The type of this cache.
Definition: cpuid.hpp:472
vsmc::CPUIDFeatureBMI2
EAX = 0x07, ECX = 0x00; EBX[08].
Definition: cpuid.hpp:159
vsmc::CPUIDFeatureSS
EAX = 0x01, ECX = 0x00; EDX[27].
Definition: cpuid.hpp:148
vsmc::CPUID::cache_param
static cache_param_type cache_param(unsigned cache_index)
Get the cache parameters (EAX = 0x04; EAX, EBX, ECX, EDX)
Definition: cpuid.hpp:637
vsmc::CPUID::cache_param_type::max_proc_sharing
unsigned max_proc_sharing() const
Maximum number of addressable logical processors sharing this cache.
Definition: cpuid.hpp:479
vsmc::CPUIDFeaturePDCM
EAX = 0x01, ECX = 0x00; ECX[15].
Definition: cpuid.hpp:106
vsmc::CPUIDFeatureBMI1
EAX = 0x07, ECX = 0x00; EBX[03].
Definition: cpuid.hpp:155
vsmc::CPUIDFeatureRDSEED
EAX = 0x07, ECX = 0x00; EBX[18].
Definition: cpuid.hpp:166
vsmc::CPUIDFeatureExtTSC
EAX = 0x80000001, ECX = 0x00; EDX[04].
Definition: cpuid.hpp:212
vsmc::CPUIDFeatureExtPGE
EAX = 0x80000001, ECX = 0x00; EDX[13].
Definition: cpuid.hpp:220
vsmc::CPUIDFeatureExt3DNOWPREFETCH
EAX = 0x80000001, ECX = 0x00; ECX[08].
Definition: cpuid.hpp:190
vsmc::CPUIDFeatureACPI
EAX = 0x01, ECX = 0x00; EDX[22].
Definition: cpuid.hpp:143
vsmc::CPUIDFeatureExtAPIC
EAX = 0x80000001, ECX = 0x00; EDX[09].
Definition: cpuid.hpp:217
vsmc::CPUIDFeatureAVX512DQ
EAX = 0x07, ECX = 0x00; EBX[17].
Definition: cpuid.hpp:165
vsmc::CPUIDFeatureFPU
EAX = 0x01, ECX = 0x00; EDX[00].
Definition: cpuid.hpp:123
vsmc::CPUIDFeatureExtFXSR_OPT
EAX = 0x80000001, ECX = 0x00; EDX[25].
Definition: cpuid.hpp:230
vsmc::CPUIDFeatureExtMTRR
EAX = 0x80000001, ECX = 0x00; EDX[12].
Definition: cpuid.hpp:219
vsmc::CPUIDCacheTypeNull
No more cache.
Definition: cpuid.hpp:241
vsmc::CPUIDFeatureExtIBS
EAX = 0x80000001, ECX = 0x00; ECX[10].
Definition: cpuid.hpp:192
vsmc::CPUIDFeatureExtMISALIGNSSE
EAX = 0x80000001, ECX = 0x00; ECX[07].
Definition: cpuid.hpp:189
vsmc::AVX
Definition: defines.hpp:92
vsmc::CPUIDFeatureCMOV
EAX = 0x01, ECX = 0x00; EDX[15].
Definition: cpuid.hpp:137
vsmc::CPUIDFeaturePSN
EAX = 0x01, ECX = 0x00; EDX[18].
Definition: cpuid.hpp:140
vsmc::CPUIDFeatureExtABM
EAX = 0x80000001, ECX = 0x00; ECX[05].
Definition: cpuid.hpp:187
vsmc::CPUIDFeatureIA64
EAX = 0x01, ECX = 0x00; EDX[30].
Definition: cpuid.hpp:151
vsmc::CPUIDFeatureVME
EAX = 0x01, ECX = 0x00; EDX[01].
Definition: cpuid.hpp:124
vsmc::CPUIDFeatureAVX512ER
EAX = 0x07, ECX = 0x00; EBX[27].
Definition: cpuid.hpp:173
vsmc::CPUIDFeatureFSGSBASE
EAX = 0x07, ECX = 0x00; EBX[00].
Definition: cpuid.hpp:154
vsmc::CPUIDFeatureFMA
EAX = 0x01, ECX = 0x00; ECX[12].
Definition: cpuid.hpp:103
vsmc::CPUID::cache_param_type::max_proc_physical
unsigned max_proc_physical() const
Maximum number of addressable processor cores in the physical package.
Definition: cpuid.hpp:483
vsmc::CPUIDFeaturePCID
EAX = 0x01, ECX = 0x00; ECX[17].
Definition: cpuid.hpp:107
vsmc::CPUIDFeaturePAE
EAX = 0x01, ECX = 0x00; EDX[06].
Definition: cpuid.hpp:129
vsmc::cxx11::integral_constant
Definition: type_traits.hpp:108
vsmc::cxx11::false_type
integral_constant< bool, false > false_type
Definition: type_traits.hpp:246
vsmc::CPUIDFeatureInfo::bit
static constexpr const unsigned bit
The bit number of the feature in the register.
Definition: cpuid.hpp:268
vsmc::CPUIDFeatureINVPCID
EAX = 0x07, ECX = 0x00; EBX[10].
Definition: cpuid.hpp:161
vsmc::CPUIDFeatureSMEP
EAX = 0x07, ECX = 0x00; EBX[07].
Definition: cpuid.hpp:158
vsmc::CPUIDFeatureExtPSE
EAX = 0x80000001, ECX = 0x00; EDX[03].
Definition: cpuid.hpp:211
vsmc::CPUIDFeatureXSAVE
EAX = 0x01, ECX = 0x00; ECX[26].
Definition: cpuid.hpp:116
vsmc::CPUIDFeatureExtDE
EAX = 0x80000001, ECX = 0x00; EDX[02].
Definition: cpuid.hpp:210
vsmc::CPUIDFeatureExtVME
EAX = 0x80000001, ECX = 0x00; EDX[01].
Definition: cpuid.hpp:209
vsmc::CPUID::cache_param_type::level
unsigned level() const
The level of this cache.
Definition: cpuid.hpp:475
vsmc::CPUIDFeatureSMX
EAX = 0x01, ECX = 0x00; ECX[06].
Definition: cpuid.hpp:98
vsmc::CPUIDFeatureDTES64
EAX = 0x01, ECX = 0x00; ECX[02].
Definition: cpuid.hpp:94
vsmc::CPUIDFeatureTM
EAX = 0x01, ECX = 0x00; EDX[29].
Definition: cpuid.hpp:150
vsmc::CPUIDFeatureInfo::ecx
static constexpr const unsigned ecx
The value of the calling parameter ECX.
Definition: cpuid.hpp:262
vsmc::CPUIDFeatureExtCMP_LEGACY
EAX = 0x80000001, ECX = 0x00; ECX[01].
Definition: cpuid.hpp:183
vsmc::SSE4_2
Definition: defines.hpp:92
vsmc::CPUIDFeatureAVX512VL
EAX = 0x07, ECX = 0x00; EBX[31].
Definition: cpuid.hpp:177
vsmc::CPUIDFeatureExtPAT
EAX = 0x80000001, ECX = 0x00; EDX[16].
Definition: cpuid.hpp:223
vsmc::CPUIDFeaturePSE
EAX = 0x01, ECX = 0x00; EDX[03].
Definition: cpuid.hpp:126
vsmc::CPUIDFeatureExtTBM
EAX = 0x80000001, ECX = 0x00; ECX[21].
Definition: cpuid.hpp:200
vsmc::CPUIDFeatureCX8
EAX = 0x01, ECX = 0x00; EDX[08].
Definition: cpuid.hpp:131
vsmc::CPUIDFeatureSSE
EAX = 0x01, ECX = 0x00; EDX[25].
Definition: cpuid.hpp:146
vsmc::CPUIDFeatureDCA
EAX = 0x01, ECX = 0x00; ECX[18].
Definition: cpuid.hpp:108
vsmc::CPUIDFeatureCLFLUSHOPT
EAX = 0x07, ECX = 0x00; EBX[23].
Definition: cpuid.hpp:170
vsmc::CPUIDFeatureExtOSVW
EAX = 0x80000001, ECX = 0x00; ECX[09].
Definition: cpuid.hpp:191
vsmc::CPUIDFeatureExtEXTAPIC
EAX = 0x80000001, ECX = 0x00; ECX[03].
Definition: cpuid.hpp:185
vsmc::CPUID::max_eax_ext
static unsigned max_eax_ext()
Maximum extended calling parameter EAX (EAX = 0x80000000; EAX)
Definition: cpuid.hpp:586
vsmc::CPUID::base_freq
static unsigned base_freq()
Base frequency in MHz (EAX = 0x16; EAX[15:0])
Definition: cpuid.hpp:650
vsmc::CPUIDFeatureExtPERFCTR_NB
EAX = 0x80000001, ECX = 0x00; ECX[24].
Definition: cpuid.hpp:203
vsmc::AVX2
Definition: defines.hpp:92
vsmc::CPUIDFeatureExtLWP
EAX = 0x80000001, ECX = 0x00; ECX[15].
Definition: cpuid.hpp:196
vsmc::operator<<
std::basic_ostream< CharT, Traits > & operator<<(std::basic_ostream< CharT, Traits > &os, const Sampler< T > &sampler)
Definition: sampler.hpp:884
vsmc::CPUIDFeatureMSR
EAX = 0x01, ECX = 0x00; EDX[05].
Definition: cpuid.hpp:128
vsmc::CPUID::intel_turbo_boost
static bool intel_turbo_boost()
Intel Turbo Boost (EAX = 0x06; EAX[1])
Definition: cpuid.hpp:646
vsmc::CPUIDFeatureINTEL_TRACE
EAX = 0x07, ECX = 0x00; EBX[25].
Definition: cpuid.hpp:171
vsmc::CPUIDFeatureAVX512IFMA52
EAX = 0x07, ECX = 0x00; EBX[21].
Definition: cpuid.hpp:169
vsmc::CPUIDFeatureExtCX8
EAX = 0x80000001, ECX = 0x00; EDX[08].
Definition: cpuid.hpp:216
vsmc::CPUIDFeatureVMX
EAX = 0x01, ECX = 0x00; ECX[05].
Definition: cpuid.hpp:97
vsmc::CPUIDFeatureFXSR
EAX = 0x01, ECX = 0x00; EDX[24].
Definition: cpuid.hpp:145
vsmc::CPUIDFeatureExtMP
EAX = 0x80000001, ECX = 0x00; EDX[19].
Definition: cpuid.hpp:225
vsmc::CPUID::has_feature
static bool has_feature()
CPU feature.
Definition: cpuid.hpp:663
vsmc::CPUID::cache_param_type::size
unsigned size() const
Cache size in byte.
Definition: cpuid.hpp:498
vsmc::CPUIDFeatureExtLAHF_LM
EAX = 0x80000001, ECX = 0x00; ECX[00].
Definition: cpuid.hpp:182
vsmc::CPUIDFeatureInfo::str
static std::string str()
A short string representing the feature.
vsmc::CPUIDFeatureSSE4_2
EAX = 0x01, ECX = 0x00; ECX[20].
Definition: cpuid.hpp:110
vsmc::CPUID::max_eax
static unsigned max_eax()
Maximum calling parameter EAX (EAX = 0x00; EAX)
Definition: cpuid.hpp:582
vsmc::CPUID::cache_param_type::wbinvd
bool wbinvd() const
Write-back invalidate/invalidate behavior on lower level caches.
Definition: cpuid.hpp:508
vsmc::CPUIDFeatureAES
EAX = 0x01, ECX = 0x00; ECX[25].
Definition: cpuid.hpp:115
vsmc::CPUIDFeatureXTPR
EAX = 0x01, ECX = 0x00; ECX[14].
Definition: cpuid.hpp:105
vsmc::CPUIDFeatureTSC_DEADLINE
EAX = 0x01, ECX = 0x00; ECX[24].
Definition: cpuid.hpp:114
vsmc::CPUIDFeatureHTT
EAX = 0x01, ECX = 0x00; EDX[28].
Definition: cpuid.hpp:149
vsmc::CPUIDFeatureHYPERVISOR
EAX = 0x01, ECX = 0x00; ECX[31].
Definition: cpuid.hpp:121
vsmc::CPUIDFeatureRDRAND
EAX = 0x01, ECX = 0x00; ECX[30].
Definition: cpuid.hpp:120
vsmc::CPUIDFeatureF16C
EAX = 0x01, ECX = 0x00; ECX[29].
Definition: cpuid.hpp:119
vsmc::CPUID::cache_param_type::partitions
unsigned partitions() const
Physical line partitions.
Definition: cpuid.hpp:489
vsmc::CPUID
Query CPUID information.
Definition: cpuid.hpp:422
vsmc::SSE2
Definition: defines.hpp:92
vsmc::cxx11::true_type
integral_constant< bool, true > true_type
Definition: type_traits.hpp:245
vsmc::CPUIDFeaturePCLMULQDQ
EAX = 0x01, ECX = 0x00; ECX[01].
Definition: cpuid.hpp:93
vsmc::CPUID::cache_param_type::complex_indexing
bool complex_indexing() const
Complex cache indexing.
Definition: cpuid.hpp:514
vsmc::CPUIDFeatureExtMSR
EAX = 0x80000001, ECX = 0x00; EDX[05].
Definition: cpuid.hpp:213
vsmc::CPUIDFeature
CPUIDFeature
CPU features.
Definition: cpuid.hpp:90
vsmc::CPUIDFeatureAVX512CD
EAX = 0x07, ECX = 0x00; EBX[28].
Definition: cpuid.hpp:174
vsmc::CPUIDFeaturePOPCNT
EAX = 0x01, ECX = 0x00; ECX[23].
Definition: cpuid.hpp:113
vsmc::CPUIDFeatureExtCMOV
EAX = 0x80000001, ECX = 0x00; EDX[15].
Definition: cpuid.hpp:222
vsmc::memcpy
void * memcpy(void *dst, const void *src, std::size_t n)
SIMD optimized memcpy with non-temporal store for large buffers.
Definition: cstring.hpp:923
vsmc::Array::data
pointer data()
Definition: array.hpp:127
vsmc::CPUID::cache_param_type::self_initializing
bool self_initializing() const
Self initializing cache (does not need SW initialization)
Definition: cpuid.hpp:501
vsmc::CPUIDFeatureDS_CPL
EAX = 0x01, ECX = 0x00; ECX[04].
Definition: cpuid.hpp:96
vsmc::CPUIDFeatureExtXOP
EAX = 0x80000001, ECX = 0x00; ECX[11].
Definition: cpuid.hpp:193
vsmc::CPUIDFeatureExtPSE36
EAX = 0x80000001, ECX = 0x00; EDX[17].
Definition: cpuid.hpp:224
vsmc::CPUIDFeatureExtSSE4A
EAX = 0x80000001, ECX = 0x00; ECX[06].
Definition: cpuid.hpp:188
vsmc::CPUID::reg_type
Array< unsigned, 4 > reg_type
The array type that holds EAX, EBX, ECX, and EDX, in that order.
Definition: cpuid.hpp:427
vsmc::CPUIDFeatureDS
EAX = 0x01, ECX = 0x00; EDX[21].
Definition: cpuid.hpp:142
vsmc::CPUIDFeatureMMX
EAX = 0x01, ECX = 0x00; EDX[23].
Definition: cpuid.hpp:144
vsmc::CPUIDFeatureExtSVM
EAX = 0x80000001, ECX = 0x00; ECX[02].
Definition: cpuid.hpp:184
vsmc::CPUID::cache_param_type
Structure of deterministic cache parameter.
Definition: cpuid.hpp:430
vsmc::CPUID::cache_param_num
static unsigned cache_param_num()
Get the number of caches.
Definition: cpuid.hpp:619
vsmc::CPUIDFeatureERMS
EAX = 0x07, ECX = 0x00; EBX[09].
Definition: cpuid.hpp:160
vsmc::CPUID::cache_param_type::fully_associative
bool fully_associative() const
Fully associative cache.
Definition: cpuid.hpp:504
vsmc::CPUIDFeatureExtPERFTSC
EAX = 0x80000001, ECX = 0x00; ECX[27].
Definition: cpuid.hpp:205
vsmc::CPUIDFeatureExtMMXEXT
EAX = 0x80000001, ECX = 0x00; EDX[23].
Definition: cpuid.hpp:228
vsmc::CPUIDFeatureExtMMX
EAX = 0x80000001, ECX = 0x00; EDX[22].
Definition: cpuid.hpp:227
vsmc::CPUIDFeatureMOVBE
EAX = 0x01, ECX = 0x00; ECX[22].
Definition: cpuid.hpp:112
vsmc::CPUIDCacheType
CPUIDCacheType
Type of CPU caches.
Definition: cpuid.hpp:239
vsmc::CPUIDFeatureSEP
EAX = 0x01, ECX = 0x00; EDX[11].
Definition: cpuid.hpp:133
vsmc::CPUID::cache_param_type::cache_param_type
cache_param_type(const reg_type &reg)
Definition: cpuid.hpp:432
vsmc::CPUIDFeatureExtNX
EAX = 0x80000001, ECX = 0x00; EDX[20].
Definition: cpuid.hpp:226
vsmc::CPUIDFeatureExt3DNOWEXT
EAX = 0x80000001, ECX = 0x00; EDX[30].
Definition: cpuid.hpp:234
vsmc::CPUID::cache_param_type::sets
unsigned sets() const
Number of sets.
Definition: cpuid.hpp:495
vsmc::cpuid
void cpuid(unsigned eax, unsigned ecx, unsigned *reg)
Get the CPUID information stored in EAX, EBX, ECX and EDX, given input EAX and ECX values...
Definition: cpuid.hpp:67
vsmc::Array
Static array.
Definition: array.hpp:79
vsmc::CPUIDFeatureInfo
CPU feature information.
Definition: cpuid.hpp:253
vsmc::CPUIDFeatureCX16
EAX = 0x01, ECX = 0x00; ECX[13].
Definition: cpuid.hpp:104
vsmc::Array::at
reference at(size_type pos)
Definition: array.hpp:101
vsmc::CPUIDFeatureMTRR
EAX = 0x01, ECX = 0x00; EDX[12].
Definition: cpuid.hpp:134
vsmc::CPUIDFeaturePGE
EAX = 0x01, ECX = 0x00; EDX[13].
Definition: cpuid.hpp:135
vsmc::CPUID::cache_param_type::ways
unsigned ways() const
Ways of associative.
Definition: cpuid.hpp:492
vsmc::CPUIDFeatureExtSYSCALL
EAX = 0x80000001, ECX = 0x00; EDX[11].
Definition: cpuid.hpp:218
vsmc::CPUIDFeatureMCE
EAX = 0x01, ECX = 0x00; EDX[07].
Definition: cpuid.hpp:130
vsmc::CPUIDFeatureSMAP
EAX = 0x07, ECX = 0x00; EBX[20].
Definition: cpuid.hpp:168
vsmc::CPUIDFeatureAPIC
EAX = 0x01, ECX = 0x00; EDX[09].
Definition: cpuid.hpp:132
vsmc::CPUIDFeatureMPX
EAX = 0x07, ECX = 0x00; EBX[14].
Definition: cpuid.hpp:163
vsmc::CPUID::max_freq
static unsigned max_freq()
Maximum frequency in MHz (EAX = 0x16; EBX[15:0])
Definition: cpuid.hpp:654
vsmc::CPUIDFeaturePREFETCHWT1
EAX = 0x07, ECX = 0x00; ECX[00].
Definition: cpuid.hpp:179
vsmc::CPUIDFeatureEST
EAX = 0x01, ECX = 0x00; ECX[07].
Definition: cpuid.hpp:99
vsmc::CPUID::bus_freq
static unsigned bus_freq()
Bus (reference) frequency in MHz (EAX = 0x16; ECX[15:0])
Definition: cpuid.hpp:658
vsmc::CPUIDFeaturePAT
EAX = 0x01, ECX = 0x00; EDX[16].
Definition: cpuid.hpp:138
vsmc::CPUIDFeatureCLFSH
EAX = 0x01, ECX = 0x00; EDX[19].
Definition: cpuid.hpp:141
vsmc::CPUIDFeatureAVX
EAX = 0x01, ECX = 0x00; ECX[28].
Definition: cpuid.hpp:118
vsmc::CPUIDFeatureExtGBPAGES
EAX = 0x80000001, ECX = 0x00; EDX[26].
Definition: cpuid.hpp:231
vsmc::CPUIDCacheTypeInstruction
Instruction cache.
Definition: cpuid.hpp:243
vsmc::CPUIDFeatureAVX512PF
EAX = 0x07, ECX = 0x00; EBX[26].
Definition: cpuid.hpp:172
vsmc::CPUIDFeatureAVX512BW
EAX = 0x07, ECX = 0x00; EBX[30].
Definition: cpuid.hpp:176
vsmc::CPUID::brand
static std::string brand()
Processor brand string (EAX = 0x80000002,0x80000003,0x80000004; EAX, EBX, ECX, EDX) ...
Definition: cpuid.hpp:604
vsmc::CPUIDFeatureAVX512F
EAX = 0x07, ECX = 0x00; EBX[16].
Definition: cpuid.hpp:164
vsmc::SSSE3
Definition: defines.hpp:92
vsmc::CPUIDFeatureMONITOR
EAX = 0x01, ECX = 0x00; ECX[03].
Definition: cpuid.hpp:95
vsmc::CPUIDFeatureOSXSAVE
EAX = 0x01, ECX = 0x00; ECX[27].
Definition: cpuid.hpp:117
vsmc::SSE4_1
Definition: defines.hpp:92
vsmc::CPUIDFeatureExtSKINIT
EAX = 0x80000001, ECX = 0x00; ECX[12].
Definition: cpuid.hpp:194
vsmc::CPUIDFeatureMCA
EAX = 0x01, ECX = 0x00; EDX[14].
Definition: cpuid.hpp:136
vsmc::CPUID::info
static std::basic_ostream< CharT, Traits > & info(std::basic_ostream< CharT, Traits > &os)
Get CPU feature using CPUID.
Definition: cpuid.hpp:536
vsmc::CPUIDFeatureExtTOPOEXT
EAX = 0x80000001, ECX = 0x00; ECX[22].
Definition: cpuid.hpp:201
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